1. Field of the Invention
The present invention relates to a layout of a memory cell array of a semiconductor memory having a resistance change element.
2. Description of the Related Art
In recent years, a nonvolatile semiconductor memory using a resistance change element as a memory cell has been attracting attention as a next generation memory. As one of such nonvolatile semiconductor memories, there is a magnetic random access memory using a magnetoresistive element as a memory cell.
The magnetic random access memory is intended to realize a large capacity of more than 1 G bits per chip, and as the technology for realizing this, a technology called spin-injection magnetization reversal has been developed (for instance, refer to the specification of U.S. Pat. No. 5,695,864).
One characteristic of spin-injection magnetization reversal lies in that the magnetization direction of a magnetic free layer is controlled in such a way as to apply a spin torque to electrons of the magnetic free layer while using electrons spin-polarized by the magnetic moment of a magnetic pinned layer. According to this technology, as the magnetoresistive element is miniaturized, a value of a spin injection current necessary for the magnetization reversal also becomes small. Therefore, it is possible to contribute to an increase in the memory capacity and realize lower electric power consumption of the magnetic random access memory.
However, in the write (magnetization reversal) system due to the spin injection, the direction of the spin injection current caused to flow through the magnetoresistive element should be changed in accordance with a value of write data. For this reason, it is necessary to supply the spin injection current to the magnetoresistive element while connecting two bit lines (write lines) to one memory cell.
Therefore, since the bit lines are arranged all over the memory cell array with minimum pitch, manufacturing becomes difficult.